A variety of high-speed Ethernet standards have been proposed for transferring data at speeds up to 10 Gb/s. One such standard, 10GBASE-LRM, transmits data over optical multimode fibers (MMF) up to distances of 220 meters. Backwards compatibility requirements for the 10GBASE-LRM standard dictate that the receiver circuitry be able to decode data transmissions accurately without an initial training sequence of data to calibrate the channel. As a result, 10GBASE-LRM receivers employ electronic dispersion compensation (EDC) technology to accurately resolve incoming data streams that are susceptible to inter-symbol-interference (ISI).
One conventional way to achieve suitable EDC results is to employ a Viterbi-decoder that takes a known channel impulse response (CIR) as an input and estimates an output sequence from an ISI-impacted input sequence of bits. Typically, a feed-forward equalizer (FFE) having complex tap adaptation and selection circuitry processes an input bit sequence and cooperates with a Least-Mean-Square Channel Estimator (LMS-CE) to generate the channel impulse response. The CIR is fed to a “Maximum-Likelihood-Sequence-Estimation” (MLSE) circuit, which includes the Viterbi decoder.
While the conventional sequence estimation circuit described above works well for its intended applications, the use of a complex feed-forward equalizer generally involves a form of finite impulse response filtering, which often results in multiplication operations for a digital system processor (DSP). Further, the FFE generally includes a set of adaptive taps that are separate from the LMS-CE taps, thus adding to the circuit complexity.